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Title:Memristor based majority logic adders for error resilient image processing applications
Authors:ID Natarajan, Nithya (Author)
ID Kuppusamy, Paramasivam (Author)
Files:URL URL - Source URL, visit https://ojs.midem-drustvo.si/index.php/InfMIDEM/article/view/2235
 
URL URL - Source URL, visit https://ojs.midem-drustvo.si/index.php/InfMIDEM/article/view/2235
 
Language:English
Typology:1.01 - Original Scientific Article
Organization:Logo MIDEM - Society for Microelectronics, Electronic Components and Materials
Abstract:Approximate Computing (AC) enables energy-efficient and high-performance computation for error-resilient applications such as data analytics, image processing, and multimedia. With the growing demand for low-power, high-density storage in Artificial Intelligence and Machine learning applications, researchers are exploring emerging technologies like FinFETs, memristors, Carbon Nano Tube FET(CNTFET), and Quantum-dot Cellular Automata (QCA) to mitigate the constraints of CMOS scaling. This paper proposes an efficient majority logic design using hybrid memristor-CMOS technology for low-power arithmetic applications. A power-efficient 1-bit adder, comprising three majority gates and one inverter, is designed and compared with existing memristor-based adders. Three Approximate Adder designs such as MAA1, MAA2, and MAA3 are implemented in 8-bit fully approximate ripple carry structure and 8-bit error-tolerant ripple carry structure, integrating four approximate and four accurate adders. Circuit performance, including power and delay, is analyzed using Cadence Virtuoso, where MAA1 achieves the lowest Power-Delay Product (PDP) in both structures. Image quality metrics, assessed using MATLAB with 8-bit pixel depth images, indicate that MAA3 attains the highest Peak Signal-to-Noise Ratio (PSNR) in the fully approximate structure. Error analysis using Verilog coding shows that the proposed MAA2 design achieves a 24.12% error rate reduction in the error-tolerant structure compared to its fully approximate counterpart, demonstrating its efficiency in balancing accuracy and power consumption.
Keywords:memristor, večinska logika, približno računanje, obdelava slik, HRTEM slika
Publication date:01.01.2025
Year of publishing:2025
Number of pages:str. 239-254
Numbering:Vol. 55, no. 4
PID:20.500.12556/DiRROS-30243 New window
UDC:621.38:004.932
ISSN on article:0352-9045
DOI:10.33180/InfMIDEM2025.404 New window
COBISS.SI-ID:281581827 New window
Note:Besedilo v angl.;
Publication date in DiRROS:18.06.2026
Views:42
Downloads:26
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Record is a part of a journal

Title:Informacije MIDEM : časopis za mikroelektroniko, elektronske sestavne dele in materiale
Shortened title:Inf. MIDEM
Publisher:Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale
ISSN:0352-9045
COBISS.SI-ID:1220612 New window

Secondary language

Language:Slovenian
Title:Memristorski logični večinski seštevalniki za aplikacije za obdelavo slik, odporne proti napakam
Abstract:Približno računanje (AC) omogoča energetsko učinkovito in visoko zmogljivo računanje za aplikacije, odporne na napake, kot so analiza podatkov, obdelava slik in multimedija. Zaradi naraščajočega povpraševanja po nizkoenergijskem shranjevanju z visoko gostoto v aplikacijah umetne inteligence in strojnega učenja raziskovalci raziskujejo nastajajoče tehnologije, kot so FinFET, memristorji, FET z ogljikovimi nano cevkami (CNTFET) in kvantno-točkovni celični avtomati (QCA), da bi zmanjšali omejitve CMOS-skaliranja. Članek predlaga učinkovit večinski logični dizajn z uporabo hibridne memristor-CMOS tehnologije za nizkoenergijske aritmetične aplikacije. Oblikovan je energijsko učinkovit 1-biten seštevalnik s tremi vrati in inverterjem. Tri zasnove seštevalnikov, kot so MAA1, MAA2 in MAA3, so implementirane v 8-bitno strukturo polne propagacije prenosa in propagacije prenosa tolerantne na napako. Delovanje vezja, vključno z močjo in zakasnitvijo, je analizirano z uporabo Cadence Virtuoso, kjer MAA1 doseže najnižji produkt moči in zakasnitve (PDP) v obeh strukturah. Merila kakovosti slike, ocenjena z uporabo MATLAB-a s slikami z 8-bitno globino pikslov, kažejo, da MAA3 doseže najvišje razmerje med signalom in šumom (PSNR) v polni približni strukturi. Analiza napak z uporabo kodiranja Verilog kaže, da predlagana zasnova MAA2 doseže 24,12-odstotno zmanjšanje stopnje napak v strukturi, tolerantni do napak, v primerjavi s polno približno strukturo, kar dokazuje njeno učinkovitost pri uravnoteženju natančnosti in porabe energije.
Keywords:memristor, majority logic, approximate computing, image processing, HRTEM image


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