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Title: Free software support for compact modelling with Verilog-A Authors: ID Bürmen, Arpad (Author) ID Tuma, Tadej (Author) ID Fajfar, Iztok (Author) ID Puhan, Janez (Author) ID Rojec, Žiga (Author) ID Kunaver, Matevž (Author) ID Tomažič, Sašo (Author) Files: URL - Source URL, visit https://ojs.midem-drustvo.si/index.php/InfMIDEM/article/view/1999   URL - Source URL, visit https://www.midem-drustvo.si/journal_papers/MIDEM_54(2024)4p4.pdf   URL - Source URL, visit https://www.midem-drustvo.si/journal_papers/MIDEM_54(2024)4p4.pdf   This document has even more files. Complete list of files is available below. Language: English Typology: 1.02 - Review Article Organization: MIDEM - Society for Microelectronics, Electronic Components and Materials Abstract: Verilog-A is the analog subset of Verilog-AMS - a hardware description language for analog and mixed-signal systems. Verilog-A is commonly used for the distribution of compact models of semiconductor devices. For such models to be usable a Verilog-A compiler is required. The compiler converts the model equations into a form that can be used by the simulator. Such compilers have been supplied with commercial simulators for many years now. Free software alternatives are much more scarce and limited in the features they offer. The paper gives an overview of Verilog-A, Free software Verilog-A compilers, and Free software/Open source simulators that can simulate compact models defined in Verilog-A. Advantages and disadvantages of individual compilers and simulators are highlighted. Keywords: hardware description langugage, Verilog-A, analog circuits, circuit simulation, compact models Publication version: Version of Record Publication date: 01.12.2024 Year of publishing: 2024 Number of pages: str. 271-281 Numbering: Vol. 54, no. 4 PID: 20.500.12556/DiRROS-29874  UDC: 004.43 ISSN on article: 0352-9045 DOI: 10.33180/InfMIDEM2024.404  COBISS.SI-ID: 216529411  Note: Besedilo v angl.; Publication date in DiRROS: 18.06.2026 Views: 112 Downloads: 126 Metadata:    Cite this work Plain text BibTeX EndNote XML EndNote/Refer RIS ABNT ACM Ref AMA APA Chicago 17th Author-Date Harvard IEEE ISO 690 MLA Vancouver : Copy citation

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Record is a part of a journal

Title:	Informacije MIDEM : časopis za mikroelektroniko, elektronske sestavne dele in materiale
Shortened title:	Inf. MIDEM
Publisher:	Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale
ISSN:	0352-9045
COBISS.SI-ID:	1220612

Document is financed by a project

Funder:	ARIS - Slovenian Research and Innovation Agency
Project number:	P2-0246-2019
Name:	ICT4QoL - Informacijsko komunikacijske tehnologije za kakovostno življenje

Licences

License:	CC BY 4.0, Creative Commons Attribution 4.0 International
Link:	http://creativecommons.org/licenses/by/4.0/
Description:	This is the standard Creative Commons license that gives others maximum freedom to do what they want with the work as long as they credit the author.

Secondary language

Language:	Slovenian
Title:	Odprtokodna programska oprema za uporabo kompaktnih modelov v jeziku Verilog-A
Abstract:	Verilog-AMS je opisni jezik za mešana analogno-digitalna vezja. Verilog-A je njegov podsklop, ki je namenjen opisu analognih vezij. Pogosto ga uporabljamo za distribucijo kompaktnih modelov polprevodniških elementov. Da bi take modele lahko uporabili v simulatorju vezij, potrebujemo prevajalnik za Verilog-A. Ta pretvori model v obliko, ki jo simulator lahko uporabi pri izračunu odziva vezja. Prevajalniki za Verilog-A so že dlje časa sestavni del tržnih programskih paketov za simulacijo vezij. Odprtokodnih alternativ je manj in podpirajo samo del specifikacije jezika. Članek poda pregled odprtokodnih prevajalnikov in simulatorjev s podporo za kompaktne medele opisane v jeziku Verilog-A s poudarkom na prednostih in slabostih posameznih prevajalnikov in simulatorjev.
Keywords:	jezik za opisovanje strojne opreme, Verilog-A, analogna vezja, simulacija vezij, kompaktni modeli

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