| Naslov: | Memristor based majority logic adders for error resilient image processing applications |
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| Avtorji: | ID Natarajan, Nithya (Avtor)
ID Kuppusamy, Paramasivam (Avtor) |
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| Datoteke: |  URL - Izvorni URL, za dostop obiščite https://ojs.midem-drustvo.si/index.php/InfMIDEM/article/view/2235
URL - Izvorni URL, za dostop obiščite https://ojs.midem-drustvo.si/index.php/InfMIDEM/article/view/2235
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| Jezik: | Angleški jezik |
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| Tipologija: | 1.01 - Izvirni znanstveni članek |
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| Organizacija: |  MIDEM - Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale
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| Povzetek: | Approximate Computing (AC) enables energy-efficient and high-performance computation for error-resilient applications such as data analytics, image processing, and multimedia. With the growing demand for low-power, high-density storage in Artificial Intelligence and Machine learning applications, researchers are exploring emerging technologies like FinFETs, memristors, Carbon Nano Tube FET(CNTFET), and Quantum-dot Cellular Automata (QCA) to mitigate the constraints of CMOS scaling. This paper proposes an efficient majority logic design using hybrid memristor-CMOS technology for low-power arithmetic applications. A power-efficient 1-bit adder, comprising three majority gates and one inverter, is designed and compared with existing memristor-based adders. Three Approximate Adder designs such as MAA1, MAA2, and MAA3 are implemented in 8-bit fully approximate ripple carry structure and 8-bit error-tolerant ripple carry structure, integrating four approximate and four accurate adders. Circuit performance, including power and delay, is analyzed using Cadence Virtuoso, where MAA1 achieves the lowest Power-Delay Product (PDP) in both structures. Image quality metrics, assessed using MATLAB with 8-bit pixel depth images, indicate that MAA3 attains the highest Peak Signal-to-Noise Ratio (PSNR) in the fully approximate structure. Error analysis using Verilog coding shows that the proposed MAA2 design achieves a 24.12% error rate reduction in the error-tolerant structure compared to its fully approximate counterpart, demonstrating its efficiency in balancing accuracy and power consumption. |
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| Ključne besede: | memristor, večinska logika, približno računanje, obdelava slik, HRTEM slika |
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| Datum objave: | 01.01.2025 |
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| Leto izida: | 2025 |
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| Št. strani: | str. 239-254 |
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| Številčenje: | Vol. 55, no. 4 |
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| PID: | 20.500.12556/DiRROS-30243  |
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| UDK: | 621.38:004.932 |
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| ISSN pri članku: | 0352-9045 |
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| DOI: | 10.33180/InfMIDEM2025.404 |
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| COBISS.SI-ID: | 281581827 |
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| Opomba: | Besedilo v angl.; |
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| Datum objave v DiRROS: | 18.06.2026 |
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| Število ogledov: | 37 |
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| Število prenosov: | 24 |
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| Metapodatki: |    |
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