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Title:
Data multiplexed and hardware reused architecture for deep neural network accelerator
Authors:
ID
Raut, Gopal
(Author)
ID
Biasizzo, Anton
(Author)
ID
Dhakad, Narendra
(Author)
ID
Gupta, Neha
(Author)
ID
Papa, Gregor
(Author)
ID
Vishvakarma, Santosh Kumar
(Author)
Files:
PDF - Presentation file,
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(1,55 MB)
MD5: 4998AED4EB96F919DDF35A538E4CDE46
Language:
English
Typology:
1.01 - Original Scientific Article
Organization:
IJS - Jožef Stefan Institute
Publication status:
Published
Publication version:
Version of Record
Year of publishing:
2021
Number of pages:
14 str.
PID:
20.500.12556/DiRROS-14652
UDC:
519.6
ISSN on article:
0925-2312
DOI:
10.1016/j.neucom.2021.11.018
COBISS.SI-ID:
85879811
Publication date in DiRROS:
09.12.2021
Views:
1417
Downloads:
602
Metadata:
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Record is a part of a journal
Title:
Neurocomputing
Shortened title:
Neurocomputing
Publisher:
Elsevier
ISSN:
0925-2312
COBISS.SI-ID:
172315
Document is financed by a project
Funder:
ARRS - Slovenian Research Agency
Project number:
P2-0098
Name:
Računalniške strukture in sistemi
Funder:
EC - European Commission
Funding programme:
Horizon 2020
Project number:
876038
Name:
Intelligent Secure Trustable Things
Acronym:
InSecTT
Funder:
EC - European Commission
Funding programme:
H2020
Project number:
101007273
Name:
Distributed Artificial Intelligent Systems
Acronym:
DAIS
Licences
License:
CC BY-NC-ND 4.0, Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International
Link:
http://creativecommons.org/licenses/by-nc-nd/4.0/
Description:
The most restrictive Creative Commons license. This only allows people to download and share the work for no commercial gain and for no other purposes.
Licensing start date:
15.11.2021
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