1. A wireless optical gate and imu system for agility assessment : architecture, synchronization and validationAnton Kos, Erik Keš, Matevž Hribernik, Sašo Tomažič, Anton Umek, 2025, izvirni znanstveni članek Povzetek: Accurate, field-ready timing and motion capture are essential for assessing agility beyond the limits of manual stopwatches. We present a modular measurement system that fuses infrared (IR) optical gates for robust event detection with a trunkworn inertial measurement unit (IMU) for kinematic profiling. Each sensing node is built on an Adafruit Feather M0 Wi-Fi microcontroller and communicates via UDP to a laptop server. Time alignment is accomplished without internet connectivity: the server establishes a relative epoch and executes a triple-handshake broadcast protocol, while timestamps are generated at the edge to avoid latency bias from transport or processing. Module- and device-level characterization shows that IR-receiver processing combined with interrupt service routine latency yields a per-event timestamp error of 0.54 ms ± 0.14 ms (latency ± uncertainty), and local clocks remain stable over the durations relevant to agility trials. In wireless operation, accepted synchronization attempts form tight response clusters in favorable RF conditions, whereas congested environments may require retries; for section times across different gates we therefore report a conservative inter-node uncertainty. End-to-end validation across laboratory, entryhall, and gym venues using the Agility T-test confirms that total test time measured on the same start/finish gate remains below 1 ms error over 10–20 s trials. Synchronized IMU waveforms add explanatory value beyond total and split times by revealing braking, change-of-direction, and re-acceleration phases. The system provides a deployable workflow with substantially improved precision over manual timing. Future work will target more robust synchronization and expanded analytics, including automated phase detection, asymmetry indices, and optional integration with indoor positioning. Ključne besede: infrared gates, IMU, embedded systems, wearable sensor device, wireless synchronization, agility testing Objavljeno v DiRROS: 18.06.2026; Ogledov: 144; Prenosov: 158
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2. Introducing EIS circuit elements in SPICE simulator environmentMatevž Kunaver, 2025, izvirni znanstveni članek Povzetek: This study introduces hypothetical circuit elements, specifically the Constant Phase Element (CPE) and Zeroth-Order Approximation of a RC Circuit (ZARC), into the SPICE circuit simulation environment to enhance Electrochemical Impedance Spectroscopy (EIS) analysis. EIS, a critical method for understanding electrochemical processes in fields such as fuel cell analysis, corrosion studies, and biomaterials, relies on fitting measured impedance curves to Equivalent Electrical Circuit (EEC) models. However, existing approaches require expert knowledge and significant mathematical effort, limiting automation. By integrating CPE and ZARC into SPICE, this work bridges the gap between EIS analysis and advanced automatic circuit design methodologies, enabling efficient model selection and parameter determination. Experimental results demonstrate the accuracy of the implemented elements through a series of case studies, evaluated using Sheppard’s criteria function. This integration marks a significant step toward automated EIS model fitting and optimization, with potential implications for advancing electrochemical and materials research. Ključne besede: electrochemical impedance spectroscopy, circuit simulators, hypothetical circuit elements, equivalent electronic circuits Objavljeno v DiRROS: 18.06.2026; Ogledov: 151; Prenosov: 177
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3. Challenges for large-scale deployment of WBG in power electronicsHenrik Lavrič, Peter Zajec, Klemen Drobnič, Andraž Rihar, Vanja Ambrožič, Danijel Vončina, Mitja Nemec, 2025, izvirni znanstveni članek Povzetek: As the demand for efficient and high-performance power electronic devices continues to grow, wide bandgap (WBG) semiconductors have emerged as a promising solution due to their superior characteristics. However, realizing their full potential requires not only the development of advanced semiconductor materials but also the optimization of packaging techniques. This paper examines the crucial role of packaging in leveraging the benefits of WBG devices, with a particular focus on mitigating inductance and addressing other critical concerns. Drawing from previous research and discussions, we explore various strategies to minimize inductance effects, enhance thermal management, ensure reliability, and optimize electrical performance. Through an interdisciplinary approach that encompasses electrical engineering, materials science, and mechanical engineering principles, this paper highlights the latest advancements in WBG device packaging, providing valuable insights for researchers and engineers working towards more efficient and reliable power electronic systems. Ključne besede: wide bandgap, semiconductors, power electronics, packaging, design Objavljeno v DiRROS: 18.06.2026; Ogledov: 126; Prenosov: 135
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4. Dual band reflectarray for transmitter/receiver ground station drone tracking applicationsViwin Singh Yobuamalan, Subramaniam Ramesh, Sweetline Shamini Sureshkumar, Chitra Sivathanu, 2025, izvirni znanstveni članek Povzetek: A dual-band, single-layer reflect array offering high gain has been developed for dual-polarized drone tracking applications. The reflect array unit comprises two center-notched spiral structures aligned orthogonally and is separated by an independent notchperfect rectangle element. Based on the reflect array unit design, a single layer 7 x 7 array, totally 49 elements for Horizontally Linearly Polarized (HLP) Ku-band transmission (12.4 – 14.8 GHz) and 49 elements for Vertically Linearly Polarized (VLP) X-band reception (10.7 – 12 GHz is designed with the phase changes of over 75o . This phase changes is obtained by adjusting the length of the notched spiral patch within the unit cell. Two distinct horn sources has been implemented to energize the orthogonal ports, supplying separate linear polarization for each frequency band. The efficiency is about 18.2 to 22% across different frequency bands, underscoring the array’s suitability for Drone Tracking applications. From the performance measures, it is found that the proposed dual-band reflect array is more suitable for drone ground station tracking applications. Additionally, this proposed structure minimizes design complexity and meets specifications of a low profile antenna with a simple structure and reduced weight. Ključne besede: dual-band, reflect array, orthogonally linear polarization, single reflecting layer, low profile Objavljeno v DiRROS: 18.06.2026; Ogledov: 112; Prenosov: 162
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5. CMOS low-power, fully-programmable Gaussian/Trapezoidal fuzzy membership function generatorSarkis Azizian, Amirhossein Fathi, Sarhad Azizian, Behbood Mashoufi, Mehdi Sefidgar Dilmaghani, 2025, izvirni znanstveni članek Povzetek: Design of a novel flexible structure for fuzzy Membership Function Generator (MFG) has been discussed in this article. The main advantage of the proposed circuits is the capability for the production of all Trapezoidal, Gaussian, S and Z shapes, simultaneously. This objective has been achieved at the first step by means of two interconnected differential pairs which generate Gaussian, S and Z shapes. Thereafter, with the help of an improved Min/Max circuit, the Trapezoidal shape with sharp edges has been constructed. The circuits are designed in a way to produce all shapes with the feature of full programmability for slope, core, and height. These features, along with small active area and low power consumption, qualify this work to be repeatedly used in Fuzzy Logic Controllers (FLCs). Post-layout simulation results for TSMC 0.18µm CMOS technology confirm the correct behavior of the designed circuits. Based on the results, the power consumption of the whole structure is 54µW from a 1.8V power supply. Ključne besede: fuzzy membership function, fuzzy logic controller, fuzzifier, min/max circuits Objavljeno v DiRROS: 18.06.2026; Ogledov: 124; Prenosov: 169
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6. Design and optimization of multiple-channel double dynamic switching biased Op-Amp for switched capacitor integrator using FinFET technologyMorteza Babaeian Far, Mehmet Aytuğ Ormanci, Firat Kaçar, 2025, izvirni znanstveni članek Povzetek: This paper presents the design and optimization of a parametric multiple-channel Double Dynamic Switching Biased Complementary Folded-Cascode Amplifier with switched capacitor integrator application in 32nm FinFET technology. The LTspice simulations demonstrate that the amplifier can attain an open-loop DC gain of 44.8dB, and a phase margin of about 87.8° with ±0.5V supply voltages. Moreover, the amplifier power consumption is measured 246µW including bias circuitry and a Gain-Bandwidth Product (GBW) of 77.45MHz under a 5pF load capacitor. The circuit’s stability enables it to offer diverse design capabilities tailored to specific application needs. This novel design is capable of reducing supply voltages and power dissipation Ključne besede: 32nm finfet technology, complementary folded-cascode amplifier, double dynamic switching bias, self-cascode, switched capacitor Objavljeno v DiRROS: 18.06.2026; Ogledov: 147; Prenosov: 137
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7. A low-power and low-noise 4-12 GHz buck CMOS low-noise amplifier with current-reused techniqueJian Liu, Li Li, 2025, izvirni znanstveni članek Povzetek: In this paper, a wideband fully integrated low-power and low-noise amplifier (LNA) is presented. It features an 8 GHz (from 4 GHz to 12 GHz) bandwidth and an excellent noise figure (NF) using 65 nm CMOS technology. This LNA was designed utilizing a current-reused technique and a cascode gain boost technique. In addition, the interstage inductors use series peaking to reduce the roll-off of high frequency gain and achieve high broadband gain. The proposed LNA circuit achieved high and flat power gain of 23.5±1 dB with input return loss less than -8 dB within the bandwidth of interest (4-12 GHz). The flat NF is 3.3±0.5 dB and the NFmin is a staggering 2.8 dB. Achieving the above performance, the third-order input point (IIP3) also reached -10.78 dBm, which is considered excellent. The LNA consumes 6.07 mW from a 1.2 V supply and occupies a layout area of 0.53x0.55 mm2 . Ključne besede: low-noise amplifier (LNA), noise figure (NF), Current-reused, CMOS Objavljeno v DiRROS: 18.06.2026; Ogledov: 111; Prenosov: 141
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8. Efficient resource allocation for ultra reliable low latency communication delay minimization in fifth generation networksParameswaran Ramesh, Bhuvaneswari Mohan, Hariharan Rajamanickam, Rishi Vharsun Jaikumar, Arun Lakshmanasamy, 2025, izvirni znanstveni članek Povzetek: In Modern world, Fifth Generation (5G) technology is ubiquitous, so it is necessary to meet all of its service requirements. Hence, resource allocation for every service is very important. This research addresses the problem of resource allocation for both Enhanced Mobile Broadband (eMBB) and Ultra Reliable Low Latency Communication (URLLC) users. The work comprises both static and dynamic resource allocation for eMBB and URLLC users. This research aims to minimize latency for URLLC users by taking into account the time and energy constraints of both eMBB and URLLC in static resource allocation, formulating these constraints as a convex optimisation problem. The results show that the static resource allocation strategy performs better than the fixed bandwidth and Central Processing Unit (CPU) cycle schemes. However, the use of static resource allocation becomes inefficient as the number of users increases. We propose a dynamic resource allocation strategy to address this issue, which uses online conformal prediction to schedule URLLC traffic on top of eMBB. The dynamic resource allocation strategy outperforms all previous resource allocation methods, ensuring 67% eMBB efficiency and 1 millisecond latency for URLLC users. Ključne besede: 5G, eMBB, URLLC, conformal prediction, resource allocation Objavljeno v DiRROS: 18.06.2026; Ogledov: 145; Prenosov: 136
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9. Fractal resonator based frequency reconfigurable antenna with varying capacitive effect for wireless applicationsAbitha Thangam Manoharan, Balakumaran Thangaraju, 2025, izvirni znanstveni članek Povzetek: A frequency reconfigurable antenna for wireless applications using a fractal antenna structure is proposed. The fractal antenna is composed of a step resonator type which has a mirror image at the vertical axis in the top with a slit and a parallel mirror image at the vertical axis in the bottom without a slit. The resonating frequency of the fractal antenna is controlled by a PositiveIntrinsic-Negative (PIN) diode. Two PIN diodes are connected between the top and bottom of the fractal antenna. With the varying capacitance effect, the four possible modes of operation of the diode are obtained at the dual resonating frequency of 2.7 and 3.2 GHz. The proposed design holds significant potential for applications in Fifth Generation New Radio (5G NR) n1 band, and Wireless Fidelity (Wi-Fi) access points due to its small size and easy control mechanism. The Specific Absorption Rate (SAR) values were analyzed and are within the safety limits. Ključne besede: reconfigurable antenna, fractal, PIN diodes, wireless, SAR Objavljeno v DiRROS: 18.06.2026; Ogledov: 119; Prenosov: 129
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10. Coati optimized hybrid neural network for efficient network slicing in 5 generation networkAyya Dhurai Suceelal Sindhu, Chellappan Agees Kumar, 2025, izvirni znanstveni članek Povzetek: Network slicing (NS) divides the physical network into many logical networks in order to support the variety of new applications with higher performance and flexibility needs. As a result of these applications, a massive amount of data has been generated with a huge number of mobile phones. Due to this, NS performance has been greatly impacted and extreme challenges have been created. To efficiently handle the challenges, this paper proposes a novel Optimal Network slice Classification Using Deep learning (ONE-CLOUD) technique, which integrates the Coati Optimization Algorithm (COA), GhostNet, and Gated Dilated Convolutional Neural Network (CNN). COA optimizes features such as user device type, packet loss ratio, and delay rate, employing GhostNet model, and Gated Dilated CNN for network slice classification. The proposed method classifies network slices into enhanced Mobile BroadBand (eMBB), Ultra-Reliable and Low-Latency Communications (URLLC), and massive Machine-Type Communications (mMTC). The effectiveness of the suggested approach has been evaluated using the 5G-SliciNdd dataset, utilizing evaluation criteria like accuracy, precision, recall, sensitivity, specificity, throughput, and reduced latency. The overall accuracy of the proposed method is 5.78%, 2.78% and 4.70% higher than the existing DQN-E2E, DRL, and AAA techniques respectively. Ključne besede: network slicing, deep learning, GhostNet, gated dilated, CNN, Coati optimization Objavljeno v DiRROS: 18.06.2026; Ogledov: 162; Prenosov: 165
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