Low power CMOS full adder cells based on alternative logic for high-speed arithmetic applicationsSubramanian, Sriram Sundar (Avtor) Gandhi, Mahendran (Avtor) 20242026-06-09 08:03:29Neznano29877UDK: 621.3ISSN pri članku: 0352-9045DOI: 10.33180/InfMIDEM2024.303COBISS_ID: 245787139sl