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<rdf:RDF xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:dc="http://purl.org/dc/elements/1.1/"><rdf:Description rdf:about="https://dirros.openscience.si/IzpisGradiva.php?id=30228"><dc:title>A low-power and low-noise 4-12 GHz buck CMOS low-noise amplifier with current-reused technique</dc:title><dc:creator>Liu,	Jian	(Avtor)
	</dc:creator><dc:creator>Li,	Li	(Avtor)
	</dc:creator><dc:subject>low-noise amplifier (LNA)</dc:subject><dc:subject>noise figure (NF)</dc:subject><dc:subject>Current-reused</dc:subject><dc:subject>CMOS</dc:subject><dc:description>In this paper, a wideband fully integrated low-power and low-noise amplifier (LNA) is presented. It features an 8 GHz (from 4 GHz to 12 GHz) bandwidth and an excellent noise figure (NF) using 65 nm CMOS technology. This LNA was designed utilizing a current-reused technique and a cascode gain boost technique. In addition, the interstage inductors use series peaking to reduce the roll-off of high frequency gain and achieve high broadband gain. The proposed LNA circuit achieved high and flat power gain of 23.5±1 dB with input return loss less than -8 dB within the bandwidth of interest (4-12 GHz). The flat NF is 3.3±0.5 dB and the NFmin is a staggering 2.8 dB. Achieving the above performance, the third-order input point (IIP3) also reached -10.78 dBm, which is considered excellent. The LNA consumes 6.07 mW from a 1.2 V supply and occupies a layout area of 0.53x0.55 mm2 .</dc:description><dc:date>2025</dc:date><dc:date>2026-06-17 19:09:37</dc:date><dc:type>Neznano</dc:type><dc:identifier>30228</dc:identifier><dc:language>sl</dc:language></rdf:Description></rdf:RDF>
